1. Field of the Invention
The present invention relates to a motor control circuit, in particular, to a motor control circuit which carries out setting a speed control gain and a phase control gain in controlling rotation driving of a motor.
2. Description of the Related Art
As to a motor control circuit for controlling a rotation speed of a motor to be constant, for example, there has been a motor control circuit which detects a deviation of pulses and controls driving power of a motor based on the deviation. The motor control circuit has a reference pulse generating circuit, a deviation detecting circuit, and a pulse width modulating circuit.
For example, a speed pulse having a frequency, which corresponds to a rotation speed of a motor, and is generated by a pulse encoder provided in the motor, is input into the motor control circuit. The reference pulse generating circuit generates a reference pulse of a frequency corresponding to a reference rotation speed of the motor. The deviation detecting circuit detects a deviation between the speed pulse and the reference pulse. The pulse width modulating circuit (PWM circuit) generates a driving pulse having a pulse width corresponding to the deviation of the pulses. The driving power to the motor is output or stopped in accordance with an output of the pulse width modulating circuit.
JP-A-2008-259321 describes a motor control circuit which adjusts a PWM driving gain of a motor by changing each of a frequency of a reference clock of a speed deviation PWM driving signal and a frequency of a reference clock of a phase deviation PWM driving signal, thereby changing a duty of the speed deviation PWM driving signal or the phase deviation PWM driving signal.
JP-A-Hei.5-236780 describes a motor control circuit including a pulse width modulating circuit. The motor control circuit controls a rotation speed of a motor, by generating a pulse width modulated driving signal of a pulse width corresponding to a deviation between a speed pulse and a reference pulse. The motor control circuit may be implemented by a digital circuit.
JP-B-Sho.63-10668 describes a motor speed control device which improves stability in the rotation number by using a stable frequency such as an output of a crystal oscillator as a speed reference and improves stability in load by inserting a low frequency compensation circuit into a speed control loop.
JP-A-Hei.7-67375 relates to a motor control circuit and describes problems in multiplication and division processing by software, and carrying out the multiplication and division processing by means of hardware.
However, in the motor control circuit of JP-A-Hei.5-236780 or JP-A-Sho.63-10668, the rotation number N of the motor is represented by the formula below, in which G is a gain, and it is assumed that B (the number of speed pulses) speed pulses are output per rotation of the motor. As shown from the formula, if the gain G is adjusted to carry out control of rotation of the motor, the number N of rotations of the motor also varies.
The rotation number N=60*f/(G*B)
In the motor control circuit of JP-A-2008-259321, in order to control the speed of the motor, a reference clock is altered (adjusted) simultaneously with gain adjustment. In the motor control circuit of JP-A-2008-259321, a PWM driving gain can be adjusted by changing a reference clock of a speed deviation PWM signal and a reference clock of a phase deviation PWM signal, thereby changing a PWM duty. Next, the operation of this kind of motor control circuit will be described with reference to FIG. 9.
FIG. 9 is a graph showing a relation between a speed deviation and a duty of a PWM driving signal in a related-art motor control circuit.
In FIG. 9, the horizontal axis indicates a speed deviation, and the vertical axis indicates a duty of a PWM driving signal (speed deviation PWM driving signal). As to the horizontal axis in FIG. 9, the rightward direction, toward which the speed deviation increases, corresponds to the direction, toward which the rotation speed of the motor slows down. The intersection point of the horizontal axis and the vertical axis indicates the state where the speed deviation is zero, namely, the state where the rotation speed is same as the set rotation number. At the intersection point of the horizontal axis and the vertical axis, the duty is 50%. The inclination of the straight lines on the X-Y coordinates presents gains of PWM driving. As the inclination of the straight lines increases, variation of the duty of the PWM driving signal responsive to variation of the speed deviation increases. In other words, as the inclination of the straight lines increases, gains increase.
The pulse width modulating circuit counts the reference clock, for the speed deviation, by a counter. In accordance with a speed determination signal, the pulse width modulating circuit also carries out addition or subtraction of a PWM reference signal, with respect to a time period during the count. Accordingly, a speed deviation PWM driving signal having a variable duty is generated. Here, if a frequency of the reference clock is reduced, the period of time during the count, which is added to the PWM reference signal, becomes long. Thus, the duty of the speed deviation PWM driving signal increases. In other words, if the frequency of the reference clock is reduced, the relation between the speed deviation and the duty of the PWM driving signal becomes close to the relation indicated by A6, from the relation indicated by A5, in FIG. 9. If the frequency of the reference clock is reduced, as long as the speed deviation prior to and after the reduction of the frequency is the same, the duty of the speed deviation PWM driving signal increases. In contrast, if the frequency of the reference clock increases, the period of time during the count is reduced, so that the duty of the PWM driving decreases. In other words, if the frequency of the reference clock increases, the relation between the speed deviation and the duty of the speed deviation PWM driving signal becomes close to the relation indicated by A7, from the relation indicated by A5, in FIG. 9. If the frequency of the reference clock increases, as long as the speed deviation prior to and after the increase of the frequency is the same, the duty of the speed deviation PWM driving signal is reduced. In other words, the reference clock is adjusted, such that the PWM driving signal is adjusted. Meanwhile, it is also possible to separately set a gain of the PWM duty by the phase deviation.
As described above, in the related-art motor control circuit, it is possible to separately set a gain of the PWM duty by the speed deviation and a gain of the PWM duty by the phase deviation. Also, it is possible to carry out gain setting by the frequency of the reference clock.
However, in the method disclosed in JP-A-2008-259321, the pulse width modulating circuit counts the reference clock by means of a counter having the fixed number of counts, with respect to the speed deviation. As such, a range of control of the motor by the PWM duty would be narrowed. In other words, if the frequency of the reference clock increases, an upper limit of the PWM driving signal is low, so that a broad control range, in which the PWM duty reaches up to 100%, cannot be obtained. For example, as to the relation between the speed deviation and the duty of the speed deviation PWM driving signal, the state indicated by A5 and the state indicated by A7, in which the frequency of the reference clock is higher than the state indicated by A5, in FIG. 9 are compared. In the relation indicated by A5, an upper limit of the duty is approximately 100%. However, in the relation indicated by A7, an upper limit of the duty is Ya (%) lower than 100%. Accordingly, as the frequency of the reference clock increases, the range of the duty ratio is narrowed. As a result, the range of control of the motor is narrowed.
Here, there is proposed a method for controlling a gain in accordance with error data and a control gain multiplier, by using a digital multiplying device. In other words, there is proposed a method for carrying out gain adjustment without influencing the PWM duty ratio, by using a digital multiplying device. For example, JP-A-Hei.7-67375 describes problems in multiplication and division processing by software, and carrying out the multiplication and division processing by means of hardware.
FIG. 10 is a view for explanation of gain control using a relate-dart digital multiplying device.
In FIG. 10, speed error data 810 (deviation data) and a control gain constant 820 are input into a multiplying device 815. The multiplying device 815 carries out processing based on the input data, and outputs control command data 817 for control of a gain. Similarly, for the phase, a multiplying device 825 outputs control command data 827 based on phase error data 830 (deviation data) and a control gain constant 840 that have been input. Based on the output control command data 817 and 827, adjusting a driving gain is carried out without influencing the reference clock for PWM duty count.
However, the digital multiplying device has complicated circuits and a large number of gates. In addition, the digital multiplying device has disadvantages because it has a relatively slow calculation processing speed. In other words, if the digital multiplying device is used, there would remain problem in miniaturization of the device using the motor control circuit, or precision of rotation driving control. JP-A-Hei.7-67375 does not count such problem in configuration or size of the hardware for multiplication and division.